Design and Implementation of Tile-shaped Fault-tolerant XOR/XNOR Gates Based on Intercellular Interactions

International Journal of Smart Electrical Engineering

دوره 10، شماره 02، شهریور 2021، صفحه 51-57   

نوع مقاله: Research Paper

شناسه دیجیتال (DOI): 10.30495/ijsee.2021.681966

نویسندگان

Fatemeh Kiayi¹؛ Behnaz Gharekhanlou^{* 2}؛ Alireza Kashaninya³

¹Department of Electrical Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran

²Department of Electrical Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran.

³Electrical Engineering Department, Central Tehran Branch, Islamic Azad University, Tehran, Iran

چکیده

Over the years, the design and implementation of fault-tolerant circuits have been one of the main concerns of the designers of electronic devices. Quantum Dot Cellular Automata (QCA) is a low-power, compact technology that is prone to various defects due to its small size. We can categorize these defects into three main groups: operational defects, manufacturing defects, and clocking defects. Using redundant cells, fault-tolerant gates, or changing the structure of the gates can improve the overall fault-tolerance of the circuit in some cases. However, increasing the fault-tolerance would lead to an increase in the occupied area and the delay of the gates. Therefore, designing a gate based on intercellular interactions with a minimum number of cells and maximum efficiency, which is also fault-tolerant, is a challenging task. In this paper, we present a new tile-shaped design for XOR and XNOR gates that is robust to the Missing cell, Extra cell, and Rotated cell defects by 25%, 55%, and 25%, respectively. That is why we call these gates TFXOR and TFXNOR, respectively.

کلیدواژه‌ها

Quantum-dot Cellular Automata؛ Fault-tolerant XOR gate؛ Fault-tolerant XNOR gate؛ Tile-shaped Fault-tolerant XOR؛ Tile-shaped Fault-tolerant XNOR