Power-efficient and high-speed design of approximate full adders using CNFET technology

International Journal of Nano Dimension

مقاله 4، دوره 13، شماره 2، مرداد 2022، صفحه 179-196   

نوع مقاله: Reasearch Paper

شناسه دیجیتال (DOI): 10.22034/ijnd.2022.686218

نویسندگان

Yavar Safaei Mehrabani^{* 1}؛ Mokhtar Mohammadi Ghanatghestani²؛ Rabe,e SharifiRad³؛ Ali Mohammad Hassanzadeh⁴

¹Department of Electrical and Computer Engineering, North Tehran Branch, Islamic Azad University, Tehran, Iran.

²Department of Computer Engineering, Bam Branch, Islamic Azad University, Bam, Iran.

³Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran.

⁴European School of Business, Reutlingen University, Reutlingen, Germany.

چکیده

Full adder cells are the major fundamental elements of larger arithmetic circuits, which are mostly located along the critical path of circuits. Therefore, the design of low-power and high-speed full adder cells is critical. In this paper, there are two new inexact full adder cells proposed based on Carbon Nanotube Field Effect Transistor (CNFET) technology. Using the HSPICE simulator by applying the 32 nm Stanford model, extensive simulations are performed at the transistor level. Different supply voltages, output loads, and ambient temperatures are involved in the operation of the cells. In addition, by applying Monte Carlo transient analysis, the effects of diameter variations of carbon nanotubes (CNTs) are examined on the performance of the proposed cells. Considering the application level, these cells are studied in image processing through MATLAB software. The superiority of the proposed cells compared to their counterparts is confirmed by extensive simulations.

کلیدواژه‌ها

CNFET؛ Full Adder؛ High-Speed؛ Image Processing؛ Power-Efficient

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