طراحی و شبیه سازی سلول حافظه دسترسی تصادفی ایستا با توان مصرفی پایین مبتنی بر ترانزیستور فین‌فت

فناوری های نوین مهندسی برق در سیستم انرژی سبز

مقالات آماده انتشار، پذیرفته شده، انتشار آنلاین از تاریخ 30 خرداد 1403   

نوع مقاله: مقاله پژوهشی

شناسه دیجیتال (DOI): 10.30486/teeges.2023.1975185.1053

نویسندگان

فاطمه ذوالفقاری سیچانی¹؛ محمد روح اله یزدانی^{* 1}؛ عاطفه سلیمی¹؛ مریم منعمیان²

¹دانشکده مهندسی برق، واحد اصفهان (خوراسگان)، دانشگاه آزاد اسلامی، خوراسگان، اصفهان، ایران

²مرکز تحقیقات پردازش تصویر و سیگنال پزشکی، دانشگاه علوم پزشکی اصفهان، اصفهان، ایران

چکیده

ترانزیستور‌های اثر میدان (فین‌فت) به دلیل توانایی بالقوه در کنترل اثرات کانال کوتاه، جریان نشتی، تاخیر انتشار و اتلاف توان، جایگزین مناسبی برای ترانزیستور‌های معمولی فلزی-اکسید-نیمه هادی (ماسفت) می‌باشند. با توجه به اینکه حافظه‌های ایستا با دستیابی تصادفی ، بیشترین فضای پردازنده‌های پیشرفته را اشغال می‌کنند، لذا عمده مصرف توان این پردازنده‌ها به این حافظه‌ها اختصاص می‌یابد. در سلول حافظه ایستا 6 ترانزیستوری رایج، هنگام خواندن و نوشتن، خازن‌های مربوط به خطوط بیت هردو باید بارگیری و تخلیه شوند. بنابراین قسمت عمده‌ای از مصرف توان، مربوط به این ساز‌و‌کار می‌باشد. در این تحقیق یک سلول حافظه 7 ترانزیستوری با استفاده از ترانزیستورهای فین‌فت با قابلیت نوشتن با استفاده از یکی از خطوط بیت پیشنهاد شده‌است. نتایج شیبه‌سازی با استفاده از نرم افزار اچ‌اس‌پایس و در فناوری 32 نانومتر نشان می‌دهد که مصرف توان این سلول در هنگام نوشتن زمانی که در سلول مقدار "0" ذخیره شده‌است، حداکثر به میزان 98.6% و هنگامی که در سلول مقدار "1" وجود دارد، به میزان 99.8% کاهش داشته‌است. همچنین میزان حاشیه امنیت در برابر نویز در حالت‌های آماده‌به‌کار و خواندن سلول به ترتیب برابر با 2025/0 و 2011/0 ولت می‌باشد.

کلیدواژه‌ها

سلول حافظه ایستا؛ دسترسی تصادفی؛ ترانزیستور فین‌فت؛ مصرف توان

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